Digital design

1. Introduction to design and testing of digital systems,
2. Languages for hardware description (VHDL, Verilog, Abel-HDL, …),
3. Technology and survey of programmable logic circuits
4. Computer arithmetics: design and synthesis of decision digital circuits,
5. Design of time dependant synchronous and asynchronous circuits, flip-flops, counters, registers, finite automata,
6. Clock signal, distribution and clock gating, synchronization,
7. Design of microprocessor, data paths, control unit, pipeline,
8. Design of synchronous communication adapters (PS/2, I2C, PCI),
9. Design of asynchronous comm. adapters (USART),
10. Memory synthesis: RAM,ROM, dual-channel
11. Design of simple graphics interfaces
12. Modular system synthesis: system on chip (SOC).

Wakerly, John F. Digital design : principles and practices, Upper Saddle River : Pearson/Prentice Hall, 2006,
Enoch Hwang. Digital Logic and Microprocessor Design with VHDL. Thomson/Nelson, 2006.
Richard E. Haskell &, Darrin M. Hanna, Digital Design. 2nd Ed. LBE Books 2012.
Zapiski s predavanj, gradivo za vaje / Lecture notes, exercises

We instruct students how computer-aided design tools are used to both simulate the VHDL or Verilog design and to synthesize the design to actual hardware. Specific behaviour of HDL tools is emphasized. We present the design of digital circuit using optimal approaches. As part of the course, students develop familiarity and confidence with designing, building and testing digital circuits, including the use of CAD tools, develop team-building skills and enhance technical knowledge through both written assignments and design projects.

Knowledge and understanding:
104 Introduction to Digital Circuits
202 Computer Systems Architecture
208 Organisation of Computer Systems
Design and implement combinational and sequential logic circuits using VHDL/Verilog, analyze the timing of digital circuits, design and implement state machines, use a complex sequential logic circuit as part of a solution to an open-ended design problem, give oral and written reports on all aspects of a design project.
Application:
Design of some complex digital circuits or a part of system on chip (SOC).
Reflection:
Understanding and the ability to design complex digital systems.
Transferable skills: They are not connected only to this particular work.
Project report and the design implementation.

Lectures, a series of lab assignments using modern CADF tools and FPGAs, homeworks, final project

Continuing (homework, midterm exams, project work)
Final (written and oral exam)
grading: 5 (fail), 6-10 (pass) (according to the Statute of UL)

AVRAMOVIĆ, Aleksej, BABIĆ, Zdenka, RAIČ, Dušan, STRLE, Drago, BULIĆ, Patricio. An approximate logarithmic squaring circuit with error compensation for DSP applications. Microelectronics journal, ISSN 0959-8324. [Print ed.], 2014, vol. 45, iss. 3, str. 263-271. , doi: . [COBISS-SI-ID 10373972]
ČEŠNOVAR, Rok, RISOJEVIĆ, Vladimir, BABIĆ, Zdenka, DOBRAVEC, Tomaž, BULIĆ, Patricio. A GPU implementation of a structural-similarity-based aerial-image classification. The journal of supercomputing, ISSN 0920-8542, Aug. 2013, vol. 65, no. 2, str. 978-996, ilustr. , doi: . [COBISS-SI-ID 9619028]
BULIĆ, Patricio, GUŠTIN, Veselko, ŠONC, Damjan, ŠTRANCAR, Andrej. An FPGA-based integrated environment for computer architecture. Computer applications in engineering education, ISSN 1061-3773. [Print ed.], Mar. 2013, vol. 21, no. 1, str. 26-35, ilustr. , doi: . [COBISS-SI-ID 7696212]
LOTRIČ, Uroš, BULIĆ, Patricio. Applicability of approximate multipliers in hardware neural networks. Neurocomputing, ISSN 0925-2312. [Print ed.], Nov. 2012, vol. 96, str. 57-65, ilustr. [COBISS-SI-ID 9160276]
BABIĆ, Zdenka, AVRAMOVIĆ, Aleksej, BULIĆ, Patricio. An iterative logarithmic multiplier. Microprocessors and microsystems, ISSN 0141-9331. [Print ed.], 2011, vol. 35, no. 1, str. 23-33, ilustr. [COBISS-SI-ID 7837780]